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Design and Implementation of Chaos Based True Random Number Generator on FPGA

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dc.contributor.author Koyuncu, İsmail
dc.contributor.author Özcerit, Ahmet Turan
dc.contributor.author Pehlivan, Ihsan
dc.contributor.author Avaroglu, Erdinc
dc.date.accessioned 2020-07-14T10:30:50Z
dc.date.available 2020-07-14T10:30:50Z
dc.date.issued 2014
dc.identifier.citation Koyuncu, I., Ozcerit, A.T., Pehlivan, I., Avaroglu, E. Design and Implementation of Chaos Based True Random Number Generator on FPGA. (2014). tr_TR
dc.identifier.isbn 978-1-4799-4874-1
dc.identifier.issn 2165-0608
dc.identifier.uri http://abakus.inonu.edu.tr/xmlui/handle/123456789/16885
dc.description 2014 22ND SIGNAL PROCESSING AND COMMUNICATIONS APPLICATIONS CONFERENCE (SIU) Book Group Author(s):IEEE Book Series: Signal Processing and Communications Applications Conference Pages: 236-239 Published: 2014 Document Type:Proceedings Paper Conference Conference: 22nd IEEE Signal Processing and Communications Applications Conference (SIU) Location: Karadeniz Teknik Univ, Trabzon, TURKEY Date: APR 23-25, 2014 Sponsor(s):IEEE; Karadeniz Tech Univ, Dept Comp Engn & Elect & Elect Engn tr_TR
dc.description.abstract Currently, chaotic signal generators is of importance in cryptographic applications and chaotic communication systems. One of the significant field of the chaotic signal oscillators are random number generators. In this paper, an FPGA-based new true random number generator system using discrete-time chaotic signal generator is presented. The system designed incorporates the Sprott 94 G chaotic system based on an FPGA deployed with IEEE 754 standard. In order to produce random bits a quantification process has been performed on the results produced by the chaotic oscillator unit. Furthermore, the XOR method has been determined as restoring function to obtain a true random bit generator. The maximum operating frequency of FPGA-based true random number generator has been able to reach up to 399,383 MHz. The 20,000-bit sequence has been generated by the designed system and they have been saved to the test result file. They have been tested using NIST test suite and FIPS-140-1 standards and successful results have been obtained. It is concluded that the FPGA-based system is able to be used in cryptologic applications. tr_TR
dc.language.iso en tr_TR
dc.publisher IEEE tr_TR
dc.subject true random number generator tr_TR
dc.subject NIST test suite tr_TR
dc.subject FPGA tr_TR
dc.subject Chaos tr_TR
dc.title Design and Implementation of Chaos Based True Random Number Generator on FPGA tr_TR
dc.type Article tr_TR


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