Herencsar N.Kartci A.Koton J.Sotner R.Alagoz B.B.Yeroglu C.2024-08-042024-08-0420199781728136660https://doi.org/10.1109/ISIE.2019.8781237https://hdl.handle.net/11616/92249IEEE Industrial Electronics Society (IES)28th IEEE International Symposium on Industrial Electronics, ISIE 2019 -- 12 June 2019 through 14 June 2019 -- 150230In this paper, an approach to design a fractional-order integral operator s where -1 < ?< 0, using an analogue technique, is presented. The integrator with a constant phase angle -80.1 degree (i.e. order ? = -0.89), bandwidth greater than 3 decades, and maximum relative phase error 1.38% is designed by cascade connection of first-order bilinear transfer segments and first-order low-pass filter. The performance of suggested realization is demonstrated in a fractional-order proportional-integral (FOPI) controller described with proportional constant 1.37 and integration constant 2.28. The design specification corresponds to a speed control system of an armature controlled DC motor, which is often used in mechatronic and other fields of control theory. The behavior of both proposed analogue circuits employing two-stage Op-Amps is confirmed by SPICE simulations using TSMC 0.18 ?m level-7 LO EPI SCN018 CMOS process parameters with ±0.9 V supply voltages. © 2019 IEEE.eninfo:eu-repo/semantics/closedAccessDC motorFOPI controllerfractional calculusfractional-order integratortwo-stage Op-AmpConference Object2019-June46747210.1109/ISIE.2019.87812372-s2.0-85070649534N/A