Design and implementation of chaos based true random number generator on FPGA

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dc.authorscopusid53984519400
dc.authorscopusid23478319500
dc.authorscopusid22951772800
dc.authorscopusid55807910500
dc.contributor.authorKoyuncu I.
dc.contributor.authorOzcerit A.T.
dc.contributor.authorPehlivan I.
dc.contributor.authorAvaroglu E.
dc.date.accessioned2024-08-04T20:04:00Z
dc.date.available2024-08-04T20:04:00Z
dc.date.issued2014
dc.departmentİnönü Üniversitesien_US
dc.description2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 -- 23 April 2014 through 25 April 2014 -- Trabzon -- 106053en_US
dc.description.abstractCurrently, chaotic signal generators is of importance in cryptographic applications and chaotic communication systems. One of the significant field of the chaotic signal oscillators are random number generators. In this paper, an FPGA-based new true random number generator system using discrete-time chaotic signal generator is presented. The system designed incorporates the Sprott 94 G chaotic system based on an FPGA deployed with IEEE 754 standard. In order to produce random bits a quantification process has been performed on the results produced by the chaotic oscillator unit. Furthermore, the XOR method has been determined as restoring function to obtain a true random bit generator. The maximum operating frequency of FPGA-based true random number generator has been able to reach up to 399,383 MHz. The 20,000-bit sequence has been generated by the designed system and they have been saved to the test result file. They have been tested using NIST test suite and FIPS-140-1 standards and successful results have been obtained. It is concluded that the FPGA-based system is able to be used in cryptologic applications. © 2014 IEEE.en_US
dc.identifier.doi10.1109/SIU.2014.6830209
dc.identifier.endpage239en_US
dc.identifier.isbn9781479948741
dc.identifier.scopus2-s2.0-84903791590en_US
dc.identifier.scopusqualityN/Aen_US
dc.identifier.startpage236en_US
dc.identifier.urihttps://doi.org/10.1109/SIU.2014.6830209
dc.identifier.urihttps://hdl.handle.net/11616/92280
dc.indekslendigikaynakScopusen_US
dc.language.isotren_US
dc.publisherIEEE Computer Societyen_US
dc.relation.ispartof2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 - Proceedingsen_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectChaosen_US
dc.subjectFPGAen_US
dc.subjectNIST test suiteen_US
dc.subjecttrue random number generatoren_US
dc.titleDesign and implementation of chaos based true random number generator on FPGAen_US
dc.title.alternativeFPGA üzerinde kaos tabanli gerçek rasgele sayi üreteci tasarimi ve gerçeklemesien_US
dc.typeConference Objecten_US

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