An experimental analog circuit realization of Matsuda's approximate fractional-order integral operators for industrial electronics
Küçük Resim Yok
Tarih
2021
Dergi Başlığı
Dergi ISSN
Cilt Başlığı
Yayıncı
Iop Publishing Ltd
Erişim Hakkı
info:eu-repo/semantics/closedAccess
Özet
Analog circuit realization of fractional order (FO) elements is a significant step for the industrialization of FO control systems because of enabling a low-cost, electric circuit realization by means of standard industrial electronics components. This study demonstrates an effective operational amplifier-based analog circuit realization of approximate FO integral elements for industrial electronics. To this end, approximate transfer function models of FO integral elements, which are calculated by using Matsuda's approximation method, are decomposed into the sum of low-pass filter forms according to the partial fraction expansion. Each partial fraction term is implemented by using low-pass filters and amplifier circuits, and these circuits are combined with a summing amplifier to compose the approximate FO integral circuits. Widely used low-cost industrial electronics components, which are LF347N opamps, resistor and capacitor components, are used to achieve a discrete, easy-to-build analog realization of the approximate FO integral elements. The performance of designed circuit is compared with performance of Krishna's FO circuit design and performance improvements are shown. The study presents design, performance validation and experimental verification of this straightforward approximate FO integral realization method.
Açıklama
Anahtar Kelimeler
fractional order integral, partial fraction expansion, Matsuda's method, analog circuit design
Kaynak
Engineering Research Express
WoS Q Değeri
N/A
Scopus Q Değeri
Q3
Cilt
3
Sayı
4
