An experimental analog circuit realization of Matsuda's approximate fractional-order integral operators for industrial electronics

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dc.authoridDeniz, Furkan Nur/0000-0002-2524-7152
dc.authoridTan, Nusret/0000-0002-1285-1991
dc.authoridAlagoz, Baris Baykant/0000-0001-5238-6433
dc.authoridKoseoglu, Murat/0000-0003-3774-1083
dc.authorwosidDeniz, Furkan Nur/ABB-9604-2020
dc.authorwosidTan, Nusret/ABG-8122-2020
dc.authorwosidAlagoz, Baris Baykant/ABG-8526-2020
dc.authorwosidKoseoglu, Murat/ABG-8975-2020
dc.contributor.authorKoseoglu, Murat
dc.contributor.authorDeniz, Furkan Nur
dc.contributor.authorAlagoz, Baris Baykant
dc.contributor.authorYuce, Ali
dc.contributor.authorTan, Nusret
dc.date.accessioned2024-08-04T20:51:35Z
dc.date.available2024-08-04T20:51:35Z
dc.date.issued2021
dc.departmentİnönü Üniversitesien_US
dc.description.abstractAnalog circuit realization of fractional order (FO) elements is a significant step for the industrialization of FO control systems because of enabling a low-cost, electric circuit realization by means of standard industrial electronics components. This study demonstrates an effective operational amplifier-based analog circuit realization of approximate FO integral elements for industrial electronics. To this end, approximate transfer function models of FO integral elements, which are calculated by using Matsuda's approximation method, are decomposed into the sum of low-pass filter forms according to the partial fraction expansion. Each partial fraction term is implemented by using low-pass filters and amplifier circuits, and these circuits are combined with a summing amplifier to compose the approximate FO integral circuits. Widely used low-cost industrial electronics components, which are LF347N opamps, resistor and capacitor components, are used to achieve a discrete, easy-to-build analog realization of the approximate FO integral elements. The performance of designed circuit is compared with performance of Krishna's FO circuit design and performance improvements are shown. The study presents design, performance validation and experimental verification of this straightforward approximate FO integral realization method.en_US
dc.identifier.doi10.1088/2631-8695/ac3e11
dc.identifier.issn2631-8695
dc.identifier.issue4en_US
dc.identifier.scopus2-s2.0-85122804312en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.urihttps://doi.org/10.1088/2631-8695/ac3e11
dc.identifier.urihttps://hdl.handle.net/11616/100412
dc.identifier.volume3en_US
dc.identifier.wosWOS:000755692900006en_US
dc.identifier.wosqualityN/Aen_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherIop Publishing Ltden_US
dc.relation.ispartofEngineering Research Expressen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectfractional order integralen_US
dc.subjectpartial fraction expansionen_US
dc.subjectMatsuda's methoden_US
dc.subjectanalog circuit designen_US
dc.titleAn experimental analog circuit realization of Matsuda's approximate fractional-order integral operators for industrial electronicsen_US
dc.typeArticleen_US

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